1. Field of the Invention
The present invention relates to fabrication processes of semiconductor devices and fabrication equipment used therein and, more particularly, to metallization processes and chemical vapor deposition apparatus used therein, and more particularly, to in situ metallization processes and chemical vapor deposition apparatus used therein.
2. Description of the Related Art
Metal lines are necessarily used in fabrication of semiconductor devices. The formation of the metal lines includes forming a metal layer on a semiconductor substrate and patterning the metal layer using photolithography/etch processes. During the photolithography process, an irregular reflection may occur on the surface of the metal layer. The irregular reflection is due to the surface roughness of the metal layer. Accordingly, an anti-reflective coating layer is widely used in order to suppress the irregular reflection.
A method of forming the metal layer and the anti-reflective coating layer is taught in U.S. Pat. No. 6,187,667 B1 to Shan et al., entitled “Method of Forming Metal Layer and/or Antireflective Coating Layer On An Integrated Circuit”. According to Shan et al., the metal layer is cooled prior to formation of the anti-reflective coating layer on the metal layer. Thus, it can prevent protrusions such as bumps from being produced on the surface of the metal layer during the formation of the anti-reflective coating layer.
In the event that the metal layer directly contacts an impurity region formed at a predetermined area of a semiconductor substrate through a contact hole that penetrates an interlayer insulating layer, metal atoms in the metal layer may be diffused into the impurity region. In this case, junction leakage current of the impurity region can be increased to cause a malfunction of a semiconductor device. Accordingly, most of highly-integrated semiconductor devices widely employ a barrier metal layer interposed between the metal layer and the impurity region. In general, the barrier metal layer is formed using a chemical vapor deposition (CVD) technique at a high temperature of about 700° C. in order to obtain good step coverage, and the metal layer is formed at a low temperature less than 500° C. Therefore, when the barrier metal layer and the metal layer are sequentially formed using an in-situ process in a single deposition apparatus, the electrical characteristics of the contact resistance between the metal layer and the impurity region may be degraded due to the high temperature of the barrier metal layer.
Further, a metallization process employing a copper layer is taught in U.S. Pat. No. 5,989,623 to Chen et al., entitled “Dual Damascene Metallization”. According to Chen et al., there is a deposition system for forming copper lines. However, the deposition system has a configuration that a CVD titanium nitride chamber and a CVD copper chamber are attached to a single transfer chamber. Thus, a source gas used in formation of a CVD titanium nitride layer can be introduced into the CVD copper chamber through the transfer chamber or vice versa. Therefore, the titanium nitride layer or the copper layer may contain impurities.
Furthermore, a technology of filling contact holes is taught in U.S. Pat. No. 6,238,533 to Satipunwaycha et al., entitled “Integrated PVD System For Aluminum Hole Filling Using Ionized Metal Adhesion Layer”. According to Satipunwaycha et al., there is provided a deposition system for forming aluminum lines. The deposition system includes two transfer chambers separated from each other and physical vapor deposition (PVD) chambers attached to the transfer chambers. However, the PVD technique exhibits remarkably poor step coverage as compared to a typical CVD technique. Therefore, according to Satipunwaycha et al., there are some limitations in forming a uniform barrier metal layer and metal contact plugs in contact holes having a high aspect ratio.